1. Technical Field
This invention relates generally to read/write operations in solid-state storage devices (SSSDs) and, more particularly, to methods and apparatus for reading and writing data in multi-level cells of solid-state memory.
2. Related Art
In solid-state memory such as flash memory and phase change memory (PCM), the fundamental storage unit (the “cell”) can be set to a number of different states, or “levels”, which exhibit different electrical characteristics. These different levels can be used to store information. To readout stored information, cell-level is detected via measurements which exploit the differing electrical characteristics to differentiate between different levels. In so-called “single-level cell” (SLC) devices, the memory cells can be set to only two levels and so can record only binary values. Other devices have so-called “multi-level cells” which can be set to q different levels, where q>2. Multi-level NOR flash memories, for instance, can store 4 levels, i.e. 2 bits, per cell. Multi-level cell (MLC) NAND flash memory chips that can store 3 bits of data per single flash cell using 25 nm process technology are currently available. Storage of 2 bits per cell in PCM chips has also been demonstrated.
When writing information to multi-level cells, each cell can be used to store a q-ary symbol with each of the q possible symbol values being represented by a different cell level. On readout of multi-level cells, the read signal level is compared with a set of reference signal levels indicative of the q cell-levels in order to determine which level each cell is set to and thus detect the stored symbol value. However, a problem in multi-level SSSDs is that the physical quantity measured during cell readout, such as electrical resistance in PCM devices, is liable to drift. In particular, the electrical resistance of PCM cells drifts upwards with time in a stochastic manner. This drift can be data-dependent, i.e. may vary for different cell levels. As another example, in flash memory cells the physical quantity measured is the transistor's threshold voltage, and this drifts upwards as a function of the number of write/erase cycles the cell is subjected to. For any given stored symbol value and hence cell level, therefore, the actual read signal level obtained on cell-readout is variable.
Drift is a serious problem for multi-level storage in that it severely compromises reliability. The readback values of neighboring levels may interfere over time, due to upward drift of the lower level towards the upper level, causing a detection error. The closer the initial spacing between levels, the more susceptible they are to drift. Hence, packing higher numbers of levels per memory cell becomes more difficult due to the increased likelihood of error during cell-state detection. On the other hand, packing more bits per cell is a crucial requirement for all memory technologies, being the best known way of reducing manufacturing cost per bit.
A few techniques have been proposed to tackle the problem of drift, but most remain at the academic interest level. One proposal is to use a certain part of the memory cell array as a reference pool of cells. These cells are written with known signal levels, and are continuously monitored during device operation, to obtain estimates of drift. The estimated drift values can then be used to update the reference levels used for level detection on readback. However, drift is a statistical phenomenon and there is significant variability between cells in the array, so reference cells may not be representative and the effectiveness of the proposed reference-cell based approaches will vary substantially over time and over different portions of the memory array. Other drawbacks of this method include: the overhead it entails, which translates to a loss of memory capacity; the penalty in terms of controller complexity and latency due to the readout of the extra cells, and issues related to the management of the pool of reference cells, e.g. wear-leveling issues.
Model-based drift cancellation techniques seek to model drift based on key parameters such as temperature, time and wear, and compensate accordingly. It is, however, difficult to obtain an accurate cell history for the key parameters. There are also fluctuations from cell to cell and there is no well-established analytical model available for short-term drift.
Techniques based on coding have been proposed to address other problems in multi-level memories. For example, rank modulation has been proposed to address endurance problems and overshoot errors in flash memories (see “Rank Modulation for Flash Memories”, Jiang et al., IEEE Trans. Inf. Theory, vol. 55, no. 6, June 2009; and US Patent Application Publications No's. 2009/0132895A1 and 2009/0132758A1). While rank modulation may offer some drift benefits, it has two severe drawbacks, namely: (i) it offers only low code rate for a given number of levels; and (ii) it lacks an efficient mapping of data bits into codewords. Hence, rank modulation does not provide a practical solution and is mostly of theoretical interest.
A technique based on coding, and aimed specifically at drift, is detailed in our copending US Patent Application Publication No. 2011/0296274A1. This technique encodes input data as N-symbol codewords of a so-called “translation-stable code”. Each codeword symbol can take one of q symbol values and is recorded in a respective q-level cell by setting the cell to a level dependent on the q-ary symbol value. The translation-stable code is such that each possible input data word is mapped by the coding scheme to a codeword with a unique sequence of relative symbol values. Such a code can be constructed from codewords in a set of one or more permutation codes. Each codeword of a permutation code is a particular permutation of a predefined vector (the “initial vector”) which has N q-ary symbols arranged in order of increasing symbol value. Detection of codewords on readback can be performed by relating the read signals for codewords to the initial vectors for the code. With a translation-stable code, information is effectively encoded in the relative, as opposed to the absolute, read signal component levels. This feature obviates primary effects of drift on detection accuracy, whereby translation-stable codes can be considered effectively drift-invariant. Translation-stable codes also offer higher code rates than rank modulation schemes for a given number of levels. However, the construction of good translation-stable codes with large minimum-distance and high rates is based on a case-by-case study as there is no systematic approach to design of such codes. Moreover, there is no known simple mapping of data bits into translation-stable codewords and vice versa.
Our copending European Patent Application no. 11183336.4, filed 29 Sep. 2011, discloses a drift-resistant technique for read-detection of permutation-based codes in multi-level SSSDs. The detection system exploits the fact that all codewords are permutations of a known set of vectors, e.g. the initial vectors for a union of permutation codes. The N q-ary symbols of each codeword are again recorded in respective q-level cells by setting the cell-level in accordance with symbol value. Memory cells are read in batches to obtain read signals corresponding to a group of codewords. Each read signal has N signal components corresponding to respective symbols of a codeword, and these components are ordered according to signal level to obtain an ordered read signal for each codeword. Components of these ordered read signals are related to symbols of the known set of initial vectors via a process which involves averaging ordered read signals and relating the average components to symbol values using predefined probabilities of occurrence of different symbol values at different symbol positions as derived from the initial vectors. In this way, reliable estimates can be obtained for the reference signal levels for the q-level cells in the current batch. These reference levels can then be used in codeword detection for the current batch. This self-adaptive technique thus uses the actual cells storing encoded data to estimate the reference levels for those cells on readback, thereby accounting for drift effects on a dynamic basis. The technique is also robust and lends itself to simple, fast decoder implementation. Good, practical encoding schemes for use in such systems nonetheless remain a matter for case-by-case study.